1. Field of the Invention
The present invention relates to data processing in a computer system, and more specifically to methods and apparatus for display of full-motion animation.
2. Art Background
Many computer systems use a region of memory called a frame buffer for storing pixel data for display on a graphics output display device. In order to display the pixel data stored in the frame buffer, a display control system reads the pixel data in the frame buffer line-by-line, converts the data into an analog video signal using a digital to analog converter (DAC), and transmits the analog video signal to the output display device. The line-by-line scanning generally begins at a region in the frame buffer corresponding to the upper left-hand corner of the display screen and continues to the lower right-hand corner.
Typically, a frame buffer is constructed of video random access memory (VRAM) devices. The VRAM devices differ from conventional dynamic random access memory (DRAM) devices because the VRAM devices contain two access ports wherein the DRAM devices typically contain one port. A first access port, called a random access port, provides conventional random access to the VRAM such that a central processing unit (CPU) coupled to the VRAM may read or write to any memory location in the VRAM. A second port, called a serial access port, provides simultaneous serial access to the VRAM such that a device coupled to the serial port can shift data in or out of the VRAM. A display circuit usually accesses the serial port to furnish pixel data to the circuitry controlling the output display. In such a configuration, the CPU can write to the VRAM while a display circuit continually furnishes pixel data to an output display.
Animation sequences are often created in computer systems that couple a display screen to this type of frame buffer based display system. When creating an animation sequence within such a configuration, animation software renders a series of frames in which each frame's image changes slightly. To provide smooth animation, approximately 15 to 30 new frames are displayed each second. As the first frame image changes to the next frame image, the effect of continuous motion is created. Therefore, to create a full-motion animation sequence, the frame buffer is continually updated.
The ability of a frame buffer to both receive pixel data and transfer the pixel data to an output display simultaneously causes certain difficulties. If the animation software writes to the frame buffer memory while the display controller is scanning the image in the frame buffer memory, then the output display may simultaneously display a graphic image from multiple animation frames. The display of improper pixel data from more than one animation frame is referred to as a "frame tear". Frame tears are particularly apparent where motion from one frame to the next causes distortion in the graphic image presented on the display.
To eliminate frame tears, certain computer systems utilize a double buffering display system. The double buffered display system provides two regions of memory in the frame buffer wherein each region of memory stores pixel data to the DAC circuitry. A first region of memory provides a first animation frame to the output display such that the first region of memory is not updated during scanning for output to the display screen. While the first memory region is displayed on the display screen, animation software renders the next animation frame in the second region of memory. After the animation software completes the next animation frame, the DAC is switched such that the second region of memory becomes the displayed frame and the first region of memory becomes the "work" region. The animation software renders the next animation frame in the work region of memory. Consequently, frame tears are eliminated in a double buffered display system because pixel data is not written to the region of memory that is currently supplying pixel data to the display screen.
When computer systems utilize a double buffered display system to create animation sequences, the CPU generates every scene in the work region for each new frame of animation in the animation sequence. The animation scenes may comprise both a background scene and animated objects. If the animated objects are being rendered on top of the background scene, the entire background scene must be generated by the CPU before it can render the animated objects. To provide high-quality real time animation, the rendering of the background and the animated objects for an animation frame must be done approximately 15 to 30 times per second.
Full-motion animation on a NTSC-resolution frame buffer requires updating approximately 345,600 pixels per frame based on the dimensions of a full NTSC-resolution frame buffer. Each frame of animation is a single screen, consisting of 345,600 pixels (720.times.480). Thus, in order to display full-motion animation at 30 frames per second, 10.368 million pixels per second (720.times.480.times.30) must be copied to the frame buffer. A modest integer reduced instruction set computer (RISC) CPU executes 10 million instructions per second (MIPS). For such a RISC CPU, approximately 1 instruction is available to paint each pixel (10 MIPS/10m pixels) in order to display full-motion NTSC-resolution animation. Moreover, the calculation of how many instructions are available per pixel does not take into account the multiple layers of image data that may need to be written in order to generate several semi-transparent images together to form the final image for each frame. This type of animation is not possible without special hardware. Therefore, it is desirable to generate full-motion NTSC-resolution animation without the use of specialized computer hardware. The present invention allows for full-motion, NTSC-resolution, 30 frames per second animation without special hardware.